Low-cost Transistorised Intercom

Several intercom circuits have appeared in EFY using integrated circuits. The circuit described here uses three easily available transistors only. Even a beginner can easily assemble it on a piece of veroboard. The circuit comprises a 3-stage resistor- capacitor coupled amplifier. When ring button S2 is pressed, the amplifier circuit formed around transistors T1 and T2 gets converted into an asymmetrical astable multivib-rator generating ring signals. These ring signals are amplified by transistor T3 to drive the speaker of earpiece.

Current consumption of this intercom is 10 to 15 mA only.

Thus a 9-volt PP3 battery would have a long life, when used in this circuit. For making a two-way intercom, two identical units, as shown in figure, are required to be used. Output of one amplifier unit goes to speaker of the other unit, and vice versa. For single-battery operation, join corresponding supply and ground terminals of both the units together. The complete circuit, along with microphone and earpiece etc, can be housed inside the plastic body of a toy cellphone, which is easily available in the market. Suggested cellphone cabinet, with the position of switches, speakers and mike etc is shown.

automatic LED emergency lamp

simple emergency lamp

try this interesting and very nice

project 4: AUTO TURN-OFF BATTERY CHARGER

This charger for series-connected 4-cell AA batteries automatically disconnects from mains to stop charging when the batteries are fully charged. It can be used to charge partially discharged cells as well. The circuit is simple and can be divided into AC-to-DC converter, relay driver and charging sections. In the AC-to-DC converter section, transformer X1 steps down mains 230V AC to 9V AC at 750 mA, which is rectified by a full-wave rectifier comprising diodes D1 through D4 and filtered by capacitor C1. Regulator IC LM317 (IC1) provides the required 12V DC charging voltage. When you press switch S1 momentarily, the charger starts operating and the power-on LED1 glows to indicate that the charger is ‘on.’ The relay driver section uses pnp transistors T1, T2 and T3 (each BC558) to energise electromagnetic relay RL1. Relay RL1 is connected to the collector of transistor T1. Transistor T1 is driven by pnp transistor T2, which, in turn, is driven by pnp transistor T3. Resistor R4 (10-ohm, 0.5W) is connected between the emitter and base of transistor T3. When a current of over 65 mA flows through the 12V line, it causes a voltage drop of about 650 mV across resistor R4 to drive transistor T3 and cut off transistor T2. This, in turn, turns transistor T1on’ to energise relay RL1. Now even if the pushbutton is released, mains is still available to the primary of the transformer through its normally open (N/O) contacts. In the charging section, regulator IC1 is biased to give about 7.35V. Preset VR1 is used for adjusting the bias voltage. Diode D6 connected between the output of IC1 and battery limits the output voltage to about 6.7V, which is used for charging the battery. Pushing switch S1 latches relay RL1 and the battery cells start charging. As the voltage per cell increases beyond 1.3V, the voltage drop across resistor R4 starts decreasing. When it falls below 650 mV, transistor T3 cuts off to drive transistor T2 and, in turn, cuts off transistor T3. 

As a result, relay RL1 de-energises to cut off the charger and red LED1 turns off. You may determine the charging voltage depending on the NiCd cell specifications by the manufacturer. Here, we’ve set the charging voltage at 7.35V for four 1.5V cells. Nowadays, 700mAH cells are available in the market, which can be charged at 70 mA for 10 hours. The open-circuit voltage is about 1.3V. The shut-off voltage point is determined by charging the four cells fully (at 70 mA for 14 hours). After measuring the output voltage, add the diode drop (about 0.65V) and bias LM317 accordingly.

CHAPTER 1

INTRODUCTION

In the last few years there is an increasing number of vehicles. This made a difficulty for traffic police to control the vehicles. And also this leads to increased number of accidents due to the violation of traffic rules. Mainly speed violation. Therefore we should implement new equipment to control the speed violation hence accidents. This was the reason for selecting ‘’SPEED CHECKER FOR HIGHWAYS’’ as our miniproject

This speed checker is very cheaper and portable. This system can be handled very easily and it can be installed in a simple manner the system provides two LDR sensors to sense the vehicle entry to the speed checker system. Also it provides a digital display to indicate the speed of the vehicle. The buzzer provided will indicate the speed violation of the vehicle by sounding an alarm. The speed limit can be pre adjusted in the circuit.

            The system displays the time taken by the vehicle in crossing the distance between the sensors that are placed in desired distance. Then the speed can be calculated as follows

Speed = distance/tim

Chapter 2

BLOCK DIAGRAM

 

Figure 2. 1 Block diagram

2.1 BLOCK DIAGRAM DESCRIPTION

SENSORS

The sensors are used to detect the entry of vehicle in to the speed checker system. Here we are using to LDR-laser set are the sensors. The resistance of LDR depends upon the intensity of light, the resistance goes low when light keeps falling on it. Otherwise the resistance will be high. Sensor 1 is connected count start block and sensor 2 is connected to count stop block, so that they enables the counting process.

COUNT START

Count start block is a monostable pulse generator whose pulse width can be adjusted. This section consists of a NE 555 IC wired in monostable mode. By reffering figure 2 IC1 is count starter which is driven by sensor 1, and the output pulse width can be adjusted by varying VR1, VR2 and the capacitor C1. The output pulse of this section enables the counting and also the output is send to the over speed detector.

COUNT STOP

            It is also a NE555 IC wired as monostable. It generates a pulse of very short period to stop the counting. Count stopper is driven by sensor 2, when sensor 2 is interrupted count stopper produce an output pulse which will stop the counting.

OVER SPEED DETECTOR

Over speed detector block consist of a monostable pulse generator, NAND gate and a buzzer. The outputs from count start and count stop sections have been fed to this detector through a two input NAND gate. If the two inputs are high (this occur when the vehicle crosses the second sensor before the designed time period) the output of the NAND gate will be low, thus the IC NE555 is triggered the output buzzer will sounds an alarm to indicate it.

ASTABLE PULSE GENERATOR

            This is an astable pulse generator which is controlled by bistable NE555 IC. This block will enable or disable the counter according to the output pulses from count start and count stop mono blocks.

COUNTER, DECODER AND DISPLAY

            The counter will count the time which the vehicle took to cross the two sensors. The counting process will enabled by the output signal from the astable pulse generator. The output of the will be in binary so it should be decoded into decimal to drive the seven segment display. Hence the display will indicate the time taken by the vehicle to cross the distance between the sensors.

Chapter 3

Circuit diagram

Fig.3. 1 shows the circuit of the speed checker. It has been designed assuming that the maximum permissible speed for highways is either 40kmph or 60kmph as per the traffic rule. The circuit is built around five NE 555 timer Ics (IC1 through IC5), four CD 4026 counter ICs (IC6 through IC9) and four 7-segment displays (DIS1 through DIS4).

Figure 3. 1circuit diagram for speed checker

3. 1 Circuit description

Fig.3.1 shows the circuit of the speed checker. It has been designed assuming that the maximum permissible speed for highways is either 40kmph or 60kmph as per the traffic rule

              The circuit is built around five NE 555 timer Ics (IC1 through IC5), four CD 4026 counter ICs (IC6 through IC9) and four 7-segment displays (DIS1 through DIS4).IC1 through IC3 function as monostables, with IC1 serving as count- start mono,IC2 as count-stop mono and IC3 as speed limit detector mono, controlled by IC1and IC2 outputs. Bistable set-reset IC4 is also controlled by the outputs of IC1and IC2 and it (IC4), in turn, controls switching on/off of the 100Hz (period=0.01 second) astable timer IC5.

               The time period of the timer NE555 (IC1) count-start monostable multivibrator is adjusted using preset VR1 or VR2 and capacitor C1.For 40kmph limit the time period is set for 9seconds using preset VR1, while for 60kmph limit the time period is set for 6seconds using preset VR2.Slide switch S1 is used to select the time period as per the speed limit (40kmph and60kmph,respectively).The junction of LDR1 and resistor R1 is coupled to pin 2 of IC1.

               Normally, light from the laser keeps falling on the LDR sensor continuously and thus the LDR offers a low resistance and pin 2 of IC1 is high. Whenever light falling on the LDR is interrupted by any vehicle, the LDR resistance goes high and hence pin 2of IC1 goes low to trigger the monostable. As a result, output pin 3 goes high for the preset period (9 or 6 seconds)and LED1 glows to indicate it. Reset pin 4 is controlled by the output of NAND gate N3 at power-on or whenever reset switch S2 is pushed.

  Normally light from the laser keeps falling on the LDR sensor continuously and thus LDR offers a low resistance and pin2 of IC 1 is high. Whenever light falling on LDR is interrupted by any vehicle, the LDR resistance goes high and hence pin 2 of IC 1 goes low to trigger the monostable. As a result, output pin 3 goes high for the preset period (9 or 6 sec) and LED 1 glows to indicate it. Reset pin 4 is controlled by the output of the NAND gate N 3 at power on or whenever reset switch S 2 is pushed.

            For IC 2, the monostable is triggered in the same way as IC 1 when the vehicle intersects the laser beam incident on LDR 2 to generate a small pulse for stopping the count and for use in the speed detection.LED 2 glows for duration for which pin 3 of IC 2 is high.

            The outputs of IC 1 and IC 2 are fed to input pins 2 and 1 of NAND gate N1, respectively. When the outputs IC 1 and IC 2 go high simultaneously (means that the vehicle has crossed the preset speed limit), output pin 3 of gate N 1 goes low to trigger monostable IC 3. The output of IC 3 is used for driving piezobuzzer, which alerts the operator speed limit violation. Resistor R 9 and capacitor C 5 decides the time period which the piezobuzzer sounds.

The output of IC 1 triggers the bistable (IC 4) through gate N 2 at the leading edge of count start pulse when pin 2 IC 4 goes low, the high output at its pin 3 enables astable clock generator IC 5. Since the count-stop pulse output of IC 2 is connected to pin 6 of IC 4 via diode D 1, it reset clock generator IC 5. IC 5 can also be reset via diode D 2 at power-on as well as when reset switch S 2 is pressed.

IC 5 is configured as an astable multivibrator whose time period is decided by preset VR 3, resistor R 12 and capacitor C 10. Using preset VR 1, the frequency of the astable multivibrator is set as 100 Hz. The output IC 5 is fed to clock pin 1 of decade counter/ 7 segment decoder IC 6 CD 4026.

IC CD 4026 is a 5-stage Johnson decade counter and an output decoder that converts the Johnson code into a 7-segment decoded output for driving DISI display. The counter advances by one count at the positive clock signal transition.

The carry-out (C out) signal from CD 4026 one clock after every 10 clock inputs to clock the succeeding decade counter in a multi decade counting chain. This is achieved by connecting pin 5 of each CD 4026 to pin 1of the next CD 4026. A high reset signal clears the decade counter to its zero count. Pressing switch S 2 provides reset signal to pin 16 of all CD 4026 ICs and resistor R 14 generate the power-on-reset signal.

The seven decoded outputs ‘a’ through ‘g’ of CD 4026s illuminate the proper segment of the seven segment displays (DIS 1 through DIS 4) used for representing the decimal digit ‘0’ through ‘9’. Resistors R 16 through R 19 limits the current across DIS 1

Through DIS 4 respectively.

Chapter 4

POWER SUPPLY

4. 1 circuit diagram

Figure 4. 1 Circuit diagram for power supply

4. 2 Description

Fig: 4. 1.1 show the circuit of the power supply. The AC mains are stepped down by transformer X 1 to deliver the secondary output of 15 volt, 500 mA. The transformer output rectified by a bridge rectifier comprising diodes D 3 through D 6, filtered by capacitor C 14 and regulated by IC 11 to provide regulated 12 V supply. Capacitor C 15 bypasses any ripple in the regulated output. Switch S 3 is used as the ‘on’ / ‘off’ switch. In mobile application of the circuit, where main 230 V AC is not available it is advisable to use an external 12 V battery. For activating the laser used in conjunction with LDR 1 and LDR 2 , separate batteries may be used.

Chapter 5

COMPOENTS

ITEM	SPECIFICATION	NO:
IC	NE 555	5
IC	CD 4026	4
IC	CD 4011	1
IC	7812	1
DIODE	IN4148	2
DIODE	IN4007	4
RESISTOR	100 K ohm	4
RESISTOR	10 K ohm	7
RESISTOR	470 ohm	5
RESISTOR	470 K ohm	1
RESISTOR	1 k ohm	4
RESISTOR	100 K ohm  preset	2
RESISTOR	20 K ohm preset	1
CAPACITOR	1000 MFD, 25V	1
CAPACITOR	0.01 MFD	5
CAPACITOR	0.1 MFD	3
CAPACITOR	10 MFD 25V	1
CAPACITOR	0.47 MFD 25V	1
CAPACITOR	0.2 MFD	1
CAPACITOR	1 MFD 25V	1
CAPACITOR	47 MFD 25V	1
CAPACITOR	100 MFD 25V	1
Miscellaneous
LED	RED	2
LED	GREEN	1
DISPLAY	7 segment	4
TRANSFORMER	12-0-12V, 500mA	1
LDR	5 mm	2
SWITCH	Push to on	2
SWITCH	ON/OFF	1

Table 5. 1List of components

5.1 CD 4026 Decade counter

Figure 5.1 CD 4026 pin out

CD 4026 consist of a 5 stage Johnson decade counter and an output decoder which converts the Johnson code  seven segment decoded output for driving one stage numerical display. These devices are particularly advantages in display application where low power dissipation. A high RESET signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low.                                                                                                        

Features 

§  Counter and seven segment decoder in single package

• Easily interfaced with seven segment display types
• Ideal for low power displays
• Standardized, symmetrical characteristics

5. 2 LDR

Figure 5.2 LDR

A photo resistor or light dependent resistor or cadmium sulfide (CdS) cell is a resistor whose resistance decreases with increasing incident light intensity. It can also be referred to as a photoconductor. A photo resistor is made of a high resistance semiconductor. If light falling on the device is of high enough frequency, photons absorbed by the semiconductor give bound electrons enough energy to jump into the conduction band. The resulting free electron (and its hole partner) conduct electricity, thereby lowering resistance. A photoelectric device can be either intrinsic or extrinsic. An intrinsic semiconductor has its own charge carriers and is not an efficient semiconductor, e.g. silicon. In intrinsic devices the only available electrons are in the valence band, and hence the photon must have enough energy to excite the electron across the entire bandgap. Extrinsic devices have impurities, also called dopants, added whose ground state energy is closer to the conduction band; since the electrons do not have as far to jump, lower energy photons (i.e., longer wavelengths and lower frequencies) are sufficient to trigger the device.

Applications

Photo resistors come in many different types. Inexpensive cadmium sulfide cells can be found in many consumer items such as camera light meters, street lights, clock radios, alarms, and outdoor clocks. And many other analog and digital applications, some of them are mentioned below. 

Analog applications

• Camera Exposure Control
• Auto Slide Focus - dual cell
• Photocopy Machines - density of toner
• Colorimetric Test Equipment
• Densitometer
• Electronic Scales - dual cell
• Automatic Gain Control – modulated light
• Source

·         Automated Rear View Mirror

Digital applications    

• Automatic Headlight Dimmer
• Night Light Control
• Oil Burner Flame Out
• Street Light Control

5. 3 CD 4011- NAND GATE

Figure 5.3  NAND gate pin out

The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They have equal source and sink current capabilities and conform to standard B series output drive. The devices also have buffered outputs which improve transfer characteristics by providing very high gain. All inputs are protected against static discharge with diodes to VDD and VSS.

Features

·         Low power TTL:

·         Fan out of 2 driving 74L compatibility: or 1 driving 74LS

·         5V–10V–15V parametric ratings

·         Symmetrical output characteristics

·         Maximum input

5. 4 LED

Figure 5. 4 LED

Like a normal diode, the LED consists of a chip of semiconducting material doped with impurities to create a p-n junction. As in other diodes, current flows easily from the p-side, or anode, to the n-side, or cathode, but not in the reverse direction. Charge-carriers—electrons and holes—flow into the junction from electrodes with different voltages. When an electron meets a hole, it falls into a lower energy level, and releases energy in the form of a photon.

The wavelength of the light emitted, and therefore its color, depends on the band gap energy of the materials forming the p-n junction. In silicon or germanium diodes, the electrons and holes recombine by a non-radiative transition which produces no optical emission, because these are indirect band gap materials. The materials used for the LED have a direct band gap with energies corresponding to near-infrared, visible or near-ultraviolet light.

5. 5 DIODES

Figure 5.5 Diode

The diode is fabricated of a semiconductor material, usually silicon, which is doped with two impurities. One side is doped with a donor or n-type impurity which releases electrons into the semiconductor lattice. These electrons are not bound and are free to move about. Because there is no net charge in the donor impurity, the n-type semiconductor is electrically neutral. The other side is doped with an acceptor or p-type impurity which imparts free holes into the lattice. A hole is the absence of an electron which acts as a positive charge. The p-type semiconductor is also electrically neutral because the acceptor material adds no net charge.

                                                                 

5. 6 NE 555

Figure 5.6 NE 555

The 555 monolithic timing circuit is a highly stable controller capable of producing accurate time delays, or oscillation. In the time delay mode of operation, the time is precisely controlled by one external resistor and capacitor. For a stable operation as an oscillator, the free running frequency and the duty cycle are both accurately controlled with two external resistors and one capacitor. The circuit may be triggered and reset on falling waveforms, and the output structure can source or sink up to 200 mA

Features

• Turn-off time less than 2 s
• Max. operating frequency greater than 500 kHz
• Timing from microseconds to hours
• Operates in both astable and monostable modes
• High output current
• Adjustable duty cycle
• TTL compatible

Internal diagram

Figure 5.7 NE 555 internal diagram

Applications

• Precision timing
• Pulse generation
• Sequential timing
• Time delay generation
• Pulse width modulation

5. 7 LM78XX, Series Voltage Regulators

Figure 5. 8. LM 78XX

The LM78XX series of three terminal regulators is available With several fixed output voltages making them useful in a wide range of applications. One of these is local on card regulation, eliminating the distribution problems associated with single point regulation. The voltages available allow these regulators to be used in logic systems, instrumentation, HiFi, and other solid state electronic equipment. Although designed primarily as fixed voltage regulators these devices can be used with external components to obtain adjustable voltages and currents. The LM78XX series is available in an aluminum TO-3 package which will allow over 1.0A load current if adequate heat sinking is provided. Current limiting is included to limit the peak output current to a safe value. Safe area protection for the output transistor is provided to limit internal power dissipation. If internal power dissipation becomes too high for the heat sinking provided, the thermal shutdown circuit takes over preventing the IC from overheating. Considerable effort was expanded to make the LM78XX series of regulators easy to use and minimize the number of

external components. It is not necessary to bypass the output, although this does improve transient response. Input bypassing is needed only if the regulator is located far from the filter capacitor of the power supply. For output voltage other than 5V, 12V and 15V the LM117

Features

• Output current in excess of 1A
• Internal thermal overload protection
• No external components required
• Output transistor safe area protection
• Internal short circuit current limit
• Available in the aluminum TO-3 package

5. 8 SEVEN SEGMENT DISPLAY

Figure 5.9 Seven segment display

The LTS-5000A/LTD-5000A/LTC-5x53x-01 is a 0.56 inch (14.22mm) height 7-Segment single, dual and quadruple displays. AlGaAs red displays have gray face and white segments. The LTS-5000A/LTD-5000A bright red, yellow and red orange displays have gray face and white segments, and green displays have gray face and green segments. The LTC-5x53x-01 displays have gray face and white segments. The AlGaAs red 7-seven segment displys are designed for applications requiring low power consumption. They are tested and selected for the excellent low current characteristics to ensure that the segments are matched at low current. Drive current as low as 1 mA per segment is available. The AlGaAs red series devices utilize LED chips which are made from AlGaAs on a non-transparent GaAs substrate. The bright red and green series devices utilize LED chips which are made from GaP on a transparent GaPsubstrate. The yellow and red orange series devices utilize LED chips which are made from GaAsP on a transparent GaP substrate.

Features

• 0.56 inch (14.22mm) digit height
• Continuous uniform segments.
• Low power requirement.
• Excellent characters appearance.

Chapter 6

INSTALLATION OF SYSTEM

Figure 6.1 installation of the system

6. 1 OPERATION

In figure 6.1 it is shown that the installation of the device on the highway for checking the speed of vehicle the LDR –laser pairs are taken out side from the circuit. And place them as shown in figure 1. Both should be in exactly opposite, that is the laser light should be directly falls on the LDRs.             

            Reset the circuit by pressing switch S2, so that the display shows ‘0000’. Using switch S1, select the speed limit (say 60 kmph) for the highway. When any vehicle crosses the first laser light, LDR1 will trigger IC 1. The out put of IC 1 goes high for the time set to cross 100 meters with selected speed (60 kmph) and the LED1 glows during for period. When the vehicle crosses the second laser light, the output of IC 2 goes high and LED 2 glows for this period.

The piezobuzzer sounds an alarm if the vehicle crosses the distance between the laser set-ups at more than the selected period (lesser period than preset period). The counter start counting when the first laser beam is intercepted and stops when second laser beam is intercepted. The time taken by the vehicle to cross both the laser beam is displayed on the seven segment display. For 60 kmph speed setting, with timer frequency set at 100 Hz, if the display count is less than “6.00” seconds, it means that the vehicle has crossed the speed limit. Reset the circuit for monitoring the speed of the next vehicle.

Chapter 7

Advantages and disadvantages

7. 1 Advantages

Ø  Accurate speed calculation

Ø  It is simple and handy.

Ø  It sounds an alarm if the permissible speed limit is violated

 

Ø  It can be design for any speed limits

Ø  Low cost and simple construction

7. 2 Disadvantages

Ø  In device the speed cannot be displayed directly.

Ø  The speed checker can check the speed of only one Vehicle at a time

Chapter 8

CONCLUSION

8.1 conclusion

By introducing this speed checker the speed violation can be caught red handed. Since this speed checker circuit is come handy, it is very easy to use and install. There for after clearing the disadvantages this speed checker circuit may be used in highways to control the speed violation and there by the blood shedding in the highways.

8. 2 Future scope of work

§  By using microprocessors the speed may be directly indicated.

§  By replacing LDR with advanced sensors this speed checker

§  Can able to check more vehicles at a time. Like optical sensors.

§  This speed checker can be interfaced with computer by using some ,

§  Advanced microprocessors.

§  Accuracy of speed may be improved by replacing NE 555 ICs with advanced timer integrated circuits.

§  This speed checker may be used to check the speed of any moving objects

BIBLIOGRAPHY

Magazines

Electronics for you, December, 2005

Websites

1. www.efy.com
2. www.circuittoday.com
3. www.datasheetcatalog.com
4. www.wikipedia.org

Books

Gayakwad RA, op amps & linear integrated circuits, prentice hall of India

APPENDIX I

I.1 PCB layout

APPENDIX II

Design

The circuit is designed for having two speed limits, 40 kmph and 60 kmph

For 40 kmph

Speed = distance/time                                                                          (1)

Where distance is the spacing between two sensors (100 meter) and time is the duration taken by the vehicle to cross the distance. For 40 kmph the time will be

Time= distance/ speed

       = 0.1/ (40/3600)                                                                            (2)

        = 9 seconds                                                                      

The time taken to cross 100 meters should not be less than 9seconds with a speed of 40 kmph. Other wise it may indicate as over speed.

Selection of VR1

For 40 kmph the IC1 should produce an output pulse of duration 9 seconds. Therefore

1.11RC = 9seconds                                                                               (3)        

Select capacitor value C as 100µF

 R = 9 / (1.11 × 100µF)                                                                          (4) 

    = 81.08 K ohm (use a 100K ohm preset)

For 60 kmph

Similarly as above

Time = 0.1/ (60/3600)                                                                           (5)    

          = 6 seconds

The time taken to cross 100 meters should not be less than 6seconds with a speed of 60 kmph. Other wise it may indicate as over speed.

Selection of VR2

For 60 kmph the IC1 should produce an output pulse of duration 6 seconds. Therefore

1.11RC = 6seconds

Select capacitor value C as 100µF

R = 6 / (1.11 × 100µF)

    = 54.05 K ohm (use a 100K ohm preset)

Design for astable pulse generator

The freaquency of astable pulse generation should be equal to 100Hz, since the counter is designing for a resolution of 0.01 seconds.

The freaquency of astable multivibrator is given by

F= C /(0.695Ra+1.39Rb)                                                                       (6)                    

   = 100Hz

Take, C = 1µF and Rb = 1K ohm

Then,

Ra = (1µF-139×1000) / (69.5)                                                               (7)  

     = 12.38K ohm   (use 20K ohm preset)   

 

APPENDIX III

DATASHEETS

1. NE555
2. CD 4026
3. CD 4011
4. LM 78XX
5. 1N4148
6. LDR